Electrically conducting regions may be defined in an amorphous silicon layer by controlled production of polycrystalline silicon regions. Such polycrystalline silicon regions may be characterized by a good electric conductivity, which may optionally be adjusted by introducing suitable dopants. Furthermore, polycrystalline silicon has a high piezoresistivity, so it may be suitable for use of wire strain gauges. Such wire strain gauges may be used in pressure sensors, for example. An electric resistance, which may be determined via a corresponding analyzer circuit, changes due to the acting pressure.
Polycrystalline silicon may be produced by a LPCVD method (low-pressure chemical vapor deposition), where the deposition rate may be determined by the process temperature. The process temperatures may vary in ranges between 400° C. and 900° C., depending on the layer of polycrystalline silicon to be deposited.
If such polycrystalline silicon layers are deposited on heat-sensitive substrates, e.g., stainless steel substrates, to produce high-pressure sensors, the high thermal stress associated with such deposition may constitute a high process risk. To define geometrically the electrically conducting regions, they may be well-defined by photolithographic process steps. This may require that a masking layer be applied to the polysilicon layer and exposed, then the exposed or unexposed regions be removed selectively and next the polysilicon layer may be plasma etched, for example. Such methods may be relatively complicated to control and may allow only a limited structural fidelity.